1. Field of the Invention
This invention relates to the treatment of semiconductor surfaces to induce micro-damage in a controlled manner.
2. Prior Art
Modern silicon technology has been able to provide the fabricator of semiconductor devices with nearly perfect silicon crystals that produce excellent SiO.sub.2 interfaces as characterized through surface state density and minority carrier lifetime. The development of silicon technology has been accomplished mainly as a result of technological advances in manufacturing techniques as opposed to the utilization of well-established physical models of the nature of interface states and lifetime killing traps. As a result, this field is still one in which active interest occurs in terms of providing information on the insight into the generation of surface states and lifetime. Studies on the importance of residual mechanical damage on Si-SiO.sub.2 interface quality have been recently reported in ARPA reports numbers 1-3 for contract No. DHC15-72-CO274. The need to impart mechanical damage to a controlled depth in the wafer and, alternatively, over controlled areas of the wafer becomes important in experiments on direct measurements of this mechanical damage and its influence on MOS capacitor properties.
Whenever semiconductor wafers are subjected to mechanical treatment, typically slicing, lapping, abrading, polishing, or sand-blasting, surface damage results. The nature of this damage has not always been understood and the correlation to semiconductor properties not fully developed. Some investigators have concluded that the damage consists entirely of cracks while others contend that dislocations are present. Surface damage of abraded silicon wafers is presented by Stickler and Booker, Phil. Mag. 8, 859 (1963), in which the authors examined single crystal silicon samples after the application of unidirectional abrasion. The abrasives used ranged from a 0.25 micron diamond to No. 240 SiC paper. By the use of transmission electron microscopy (TEM) this report demonstrated that damage varied in a progressive manner with the severity of the abrasive treatment, and ranged from rows of single dislocations to bands of dislocations and cracked material. The corresponding depth of damage ranged from 0.2 .mu.m to 25 .mu.m and for fine abrasion they observed anisotropy of damage. This feature, however, disappeared for coarse abrasive treatment. This report also noted that annealing changed the dislocation configurations as well as causing new dislocations to be propogated to relieve elastic strains.
Research such as the type above cited has led to general agreement that dislocations are formed whenever damaged semiconductor samples are annealed. The formation and propagation of dislocations materially alters yield rates of semiconductor devices and, accordingly, the importance of damage-free surfaces on high quality silicon is apparent. However, necessary mechanical operations such as polishing and cutting cannot be avoided and along with device processing makes the study of semiconductor surface properties important as a means of evaluating the performance of resulting devices. The prior art is completely devoid of any technique for inducing a known and controlled damage on wafer surfaces to enhance a study of damage characteristics both before and after device processing.